If the clock frequency input to the circuit shown in the illustration were 2 kHz, what would be indicated at the output of 'FF-3' at the Q3 output? EL-0087
Official USCG Answer & Rule Citation
Correct Answer: Option A — 125 Hz
Each flip-flop in a binary counter chain acts as a frequency divider by two. With a 2 kHz input, the first stage outputs 1 kHz, the second 500 Hz, and the third (FF-3) outputs 250 Hz. The Q3 output of the third stage results in a frequency of 125 Hz.
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